There are many steps involved in the typical fabrication of substrates, such as semiconductor wafers. More particularly, substrate fabrication often involves photolithography (or more simply “lithography”) and/or pattern transfer using such lithography.
For example, the photolithography during a typical fabrication of a semiconductor wafer involves the deposition of a layer or several layers followed by the deposition of a layer which is sensitive to light. The photosensitive material (i.e., “photoresist”) is then exposed to light which has been patterned by an optical system, typically by projection through a mask. The light interacts with the photosensitive material and changes its solubility properties in a developing solution such as an aqueous base solution. Either the exposed or the unexposed portion is then removed by dissolution in the developing solution leaving a patterned photosensitive layer.
This patterned layer then serves as a mask for the pattern transfer process. That process usually involves the removal of the underlying material (e.g., etching), deposition of material, or the mask for implantation by ions.
It is common for a sample of the manufactured wafers to be measured and examined after one or more of these steps to confirm that it falls within an acceptable range of post-step error or non-uniformity. One of the things that is often tested is the resulting pattern of lines and spaces on the surface of a substrate. Herein, that is called a patterned wafer or simply a pattern.
Of course, during the fabrication process these lithography and pattern transfer actions are repeated many times with differing patterns for each layer. These stacks of multiple ultimately form three-dimensional (3D) electrical structures, components, and devices.
The resulting pattern is tested to determine if there is an error in some part of the processes and/or otherwise some non-uniformity. Conventional technology typically measures the critical dimensions (CDs) of the lines of a pattern to decide about error or non-uniformity. The CD of a line typically includes line width (LW) and/or line-edge roughness (LER). Because the CD/LER is the key to the conventional approach to these determinations, this technology is typically called critical dimension (CD) metrology.
Because of the extraordinarily small scale of the pattern of lines and spaces, a scanning electron microscope (SEM) is typically used with CD/LER metrology. Consequently, a SEM used for this task is called a CD-SEM.
A conventional CD-SEM uses an electron beam to form images of microscopic features of a patterned wafer at extremely high magnification. Traditionally, such CD-SEMs generate output that informs the human users about the CDs of the patterned wafer. Based on this information, the users decide whether the patterned wafer meets specifications. If it does not, then the users determine what tasks need to be taken to adjust the wafer manufacture process to ameliorate the error or non-uniformity.
The Detailed Description references the accompanying figures. In the figures, the left-most digit(s) of a reference number identifies the figure in which the reference number first appears. The same numbers are used throughout the drawings to reference like features and components.